Automatic test pattern generation for multi - clock digital system based on s amp; amp; cct 基于安全充分捕獲技術(shù)的多時(shí)鐘數(shù)字系統(tǒng)測(cè)試矢量生成
An automatic test pattern generation ( atpg ) algorithm for deliberately selected delay faults is presented to cope with the crosstalk - induced delay effects on longer paths 由于電路中較長(zhǎng)的通路具有較短的松弛時(shí)間,因此容易因?yàn)榇當(dāng)_問(wèn)題產(chǎn)生時(shí)延故障。
ATPG (acronym for both Automatic Test Pattern Generation and Automatic Test Pattern Generator) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital circuit, enables automatic test equipment to distinguish between the correct circuit behavior and the faulty circuit behavior caused by defects. The generated patterns are used to test semiconductor devices after manufacture, and in some cases to assist with determining the cause of failure (failure analysis.